Multi-chip modules (MCM) are substrates on which more than one integrated circuit chip is mounted. The substrate (e.g., a chip carrier) typically includes bonding pads for the chip, where the pads may be connected by a set of conductive lines to contact pads for a package or to other bonding pads on the substrate. The conductive lines thus form an interconnect network or I/O path for multiple elements mounted on a common substrate. Although there are other methods for electrically connecting an integrated circuit chip or other component to a substrate, the most commonly used ones are termed flip-chip bonding, wire bonding, and tape automated bonding (TAB).
In flip-chip (or solder bump) bonding, solder bumps are placed on the I/O pads of a chip and reflowed to form a bond with the chip pads. The chip is placed on a holder in a face-up position, flipped over (i.e., face-down) and aligned with the corresponding conductive bonding pads on the substrate. The chip pads and substrate pads are then brought into physical contact. The solder is reflowed by application of heat, causing the bumps to fuse with the bonding pads and provide both an electrical and structural connection between the chip's I/O pads and the substrate. In wire bonding processes, the chips are attached to the substrate in a face-up position and thin gold or aluminum wires are then connected between the I/O pads of the chip and the bonding pads of the substrate. The wires are connected to the two sets of pads by means of a thermocompression, thermosonic, or ultrasonic welding operation. In TAB bonding, the chips are attached to the substrate in a face-up position and the I/O pads of the chips are then bonded to metal pads on a polyimide film tape by either reflowing or thermocompression/ultrasonic bonding metal and/or solder bumps placed on the tape.
Each of the described methods for interconnecting chips to a substrate has its associated advantages and disadvantages. Flip-chip methods provide the highest density of I/O interconnects and therefore the capability of producing the smallest MCMs. The I/O connections may be made at the periphery of the chip or in its interior. The flip-chip bonds provide a good electrical connection, but the solder joints generally exhibit poor heat dissipation capability (low thermal conductivity). Another disadvantage is that the integrity of the solder joint between the pads can be reduced by thermally induced metal fatigue (differential thermal expansion between the components), and by corrosion caused by trapped solder flux or contaminants. Shorting between closely spaced bumps can occur when the solder is reflowed. In addition, because the solder must be heated to a sufficient temperature to cause it to reflow, flip-chip bonding may not be suited for use with some temperature sensitive components (i.e., components which are damaged, or have their electrical characteristics unacceptably altered when heated to solder reflow temperatures).
Wire bonding is a mature technology, however, the wires used in wire bonding are purposefully made very thin, thereby limiting the power they can transfer without failure. In addition, the lead inductance and resistance of the wires result in a degradation of the electrical performance of the interconnects. Wire bond connections have a larger footprint than flip-chip interconnects, and thus require a comparatively larger substrate than flip-chip bonded MCMs. The wires also form a relatively long signal propagation path compared to other interconnect methods. In addition, embrittlement of the interconnections as a result of the formation of intermettalics can cause a failure of the bonds (e.g., this is a problem between gold wirebonds and aluminum pads).
TAB interconnections offer the benefits of a smaller bonding pad and pitch than wire bonding. However, like wire bonding, TAB is limited to the interconnection of chips having perimeter I/O pads. This typically results in a lower overall I/O density than can be obtained using flip-chip technologies. TAB interconnects also generally have a higher capacitance and greater parasitic inductance than do flip-chip bonds. Finally, because TAB assembly usually requires different tooling for each chip design, TAB is a relatively expensive bonding method.
What is desired is a method for interconnecting integrated circuit chips to a substrate which overcomes some of the disadvantages of presently available methods, while retaining many of the benefits of those methods. It is particularly desired to have a method for interconnecting chips to a substrate which has the benefits of flip-chip bonding, without the drawbacks of that method.